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Design and Implementation of an FPGA-based hardware/software platform to accelerate algorithms
Betreuer Dipl.-Ing. Michael Klaiber
Prüfer Prof. Dr.-Ing. Sven Simon

The goal of this thesis is to design and implement an FPGA-based computing system as an evaluation platform for new hardware designs. This computing system consists of a soft-core processor and several specialized execution units (SEU). The soft-core processor executes a program and can access the SEUs using an API. These SEUs are hardware cores, which accelerate computational expensive tasks.

The thesis includes the following tasks:
-    Literature research and evaluation of existing architectures
-    Design of a computing system, accelerator core,  communication infrastructure and peripheral components
-    Implementation of this system
-    Providing a demo application

-    Advanced knowledge of VHDL and design of digital hardware
-    Good Knowledge of C/C++
-    Experience with Xilinx development tools
-    Experience with Xilinx EDK

Suitable for students of
-    Computer Science
-    Electrical Engineering