zur Startseite

OptimizeHPC Projekt

Code Optimization and Auto-Tuning for Simulation on Heterogeneous Parallel Architectures
Gefördert durch
Beginn 2017/11/01
Leiter Prof. Dr. rer. nat. habil. Miriam Mehl
Mitarbeiter Brunn, Malte
Ansprechpartner Brunn, Malte

Recent trends in hardware advancements pose a challenge to the development of simulation
software. In particular, since the saturation of the CPU clock frequency around 2005, hardware
has diverged in terms of the number of cores, parallel units and accelerator cards to ensure
the acceleration of about a factor 100 every five years (Moore’s law). Especially the latter ones
prevent hardware-independent programming, as they require custom-tailored code. And even
performance-optimized code for a certain platform will typically not show optimal behavior
on a similar system with slightly different parameters. Program-specific parameters have to be
determined, such as the number of parallel threads, the size of messages for communication, or
the number of bytes fetched from memory in a coalesced manner.